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1 Introduction

This tutorial assumes that you have developed control software in C, C++, C# and/or Java. Most likely you have worked hands-on with finite state machines in some form or other, maybe with Harel state machines or UML statecharts. You’ve seen that deeply nested if-then-else control logic leads to debugging nightmares – every fix seems to break something else. You’ve experienced unhandled events, race conditions, deadlocks and live-locks, some of which are not reproducible. You know about state machine determinism and non-overlapping guards.

The tutorial also assumes that you already generally understand the benefits Dezyne brings to developing control software – see the next paragraph – and that you now want to create something realistic with it, gaining fluency with its domain-specific language and its techniques.

Benefits summary: Dezyne enables you to methodically and efficiently divide complex control problems into verified problem-free components and interfaces that you re-compose into reliable, trustworthy systems. Verified Dezyne models have no unhandled events, problematic race conditions, deadlocks or live-locks in their core state-management and communications “skeleton” logic. Source code that Dezyne auto-generates from models will be free of these same problems. For more information about Dezyne’s benefits, see the materials on the Verum’s Dezyne website or contact Verum.

Dezyne runs on all common platforms. Dezyne Models are expressed in a simple, immediately familiar C/Java-like language.